x86: Deadlock in vlapic_error()
Key facts
- Attack vector
- Network
- Privileges required
- None
- User interaction
- None
- Attack complexity
- Low
- Impact type
- Information disclosure
- Confidentiality · integrity · availability
- Low · Low · Low
- Fix status
- No fix listed
Attack profile from CVSS 3.1 · CISA ADP. Fix status from CNA. Impact type from CWE-209.
Summary
In x86's APIC (Advanced Programmable Interrupt Controller) architecture, error conditions are reported in a status register. Furthermore, the OS can opt to receive an interrupt when a new error occurs. It is possible to configure the error interrupt with an illegal vector, which generates an error when an error interrupt is raised. This case causes Xen to recurse through vlapic_error(). The recursion itself is bounded; errors accumulate in the the status register and only generate an interrupt when a new status bit becomes set. However, the lock protecting this state in Xen will try to be taken recursively, and deadlock.
Why it matters now
SSVC decision points
CISA ADP · SSVC 2.0.3
- Exploitation
- None
- Automatable
- No
- Technical impact
- Partial
The decision (Track, Attend, Act) also depends on your mission and well-being impact; see CISA's SSVC guide.
Affected products
Remediation
No fixed version listed by the sources yet.
Vendor assessments
Timeline
- 2026-10-02 Threatist record created from CVE-2024-45817
- 2026-10-03 Alias added: GHSA-x9f9-xjf3-f3v6
References
More Xen vulnerabilities
- TI-2012-00210 The x86-64 kernel system-call functionality in Xen 4.1.2 and earlier, as used in Citrix… CVSS 2.0HIGH 7.2
- TI-2023-07042 Information disclosure through error messages in AMD Ryzen™ 3000 Series Desktop… CVSS 3.1MEDIUM 5.5
- TI-2015-04333 The C+ mode offload emulation in the RTL8139 network card device model in QEMU, as used… CVSS 2.0HIGH 9.3
- TI-2015-06741 The KVM subsystem in the Linux kernel through 4.2.6, and Xen 4.3.x through 4.6.x, allows… CVSS 3.1CRITICAL 10.0
- TI-2018-06436 A statement in the System Programming Guide of the Intel 64 and IA-32 Architectures… CVSS 3.0HIGH 7.8
- TI-2024-20522 x86: Incorrect logic for BTC/SRSO mitigations CVSS 3.1HIGH 7.5
Sources
- CVE-2024-45817 · CVE Program
- CVE-2024-45817 · NVD
- FIRST EPSS
- GHSA-x9f9-xjf3-f3v6 · GitHub Advisory Database · CC BY 4.0
- CVE-2024-45817 · Red Hat security data · CC BY 4.0
This product uses the NVD API but is not endorsed or certified by the NVD. Sources and licences